amdgpu nbio_v7_9: NULL dereference in hard IRQ when a RAS interrupt arrives before RAS late_init

Impact

The nbio_v7_9 RAS controller interrupt handler dereferences the RAS context and the PCIE_BIF RAS object without NULL checks. Both can be NULL during the window between adev->nbio.ras being set early in amdgpu_ras_init() and the PCIE_BIF object being created in RAS late_init, so a fatal-error interrupt arriving in that window panics the host in hard-IRQ context. nbio_v7_9 is the datacenter Instinct generation, so this lands on AMD GPU compute nodes specifically. It is not attacker-triggered - it is a boot-time crash risk on a node whose GPU reports a RAS error early - but it turns a recoverable hardware error into an unplanned node outage.

Who can reach it

No attacker needed and no authentication path: the trigger is a GPU PCIe/BIF fatal-error interrupt during driver initialization. Local or remote users cannot induce it directly.

What to do

Apply the stable amdgpu fix that checks the RAS context and object before dereferencing. This is a kernel/driver update: reload amdgpu or reboot the node, which means draining GPU work either way. No CVSS score or AMD advisory is present in the record.

References

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