GPU VulnDB

Database/Kernel, userspace & hypervisor

Linux kernel (drivers/iommu): In an SVA context the IOMMU walks and caches the CPU's page tables, and on x86 every

CVE-2025-71089Kernel, userspace & hypervisorcurated

Impact

In an SVA context the IOMMU walks and caches the CPU's page tables, and on x86 every process page table maps the kernel half. The kernel had no way to tell the IOMMU when a kernel page-table page was freed and recycled, so the IOMMU kept walking stale entries into memory that now holds attacker-controlled data. That is a device DMA engine pointed at arbitrary physical memory - full host compromise potential from a device a tenant drives. This patch is the first of the series and hard-disables SVA on x86 until the invalidation mechanism (CVE-2025-71202) is in place.

Who can reach it

Local unprivileged, on x86 hosts with IOMMU SVA enabled and an SVA/PASID-capable device reachable by the tenant (Intel DSA/IAA, SVM-capable GPUs, PRI-capable NICs). The trigger is ordinary kernel page-table page recycling - the series notes vfree() is the common case and is reachable by unprivileged users - combined with an SVA-bound device that still has the stale entry cached. Requires CONFIG_IOMMU_SVA and a driver that offers SVA binding to userspace.

What to do

No fixed release is listed in this record; apply the linked stable commits (this one plus CVE-2025-71202, which lands the actual kernel-VA invalidation) or run a current stable/LTS kernel. Interim: turn off SVA/PASID for tenant-facing devices, keep SVA-capable accelerator nodes out of tenant containers, and verify no tenant workload silently depends on shared virtual addressing before flipping it off.

References

This entry is curated: imported from vendor advisories with machine assistance, not yet individually verified. Confirm against your vendor's advisory before acting, and report anything wrong.