AMD IOMMU register interface - ASP coherency: Improper access control on the IOMMU register interface lets a privileged

Impact

Improper access control on the IOMMU register interface lets a privileged attacker force non-coherent accesses by the AMD Secure Processor. Incoherent reads by the security engine mean it can be shown stale or inconsistent data - a subtle way to make the ASP act on something other than what is actually in memory.

Who can reach it

Local, privileged, via the IOMMU register interface.

What to do

Fixed in AMD reference firmware (AGESA / SEV firmware) and delivered to you only as an OEM SBIOS/BIOS package - Dell, HPE, Supermicro, Lenovo, Gigabyte and the ODMs each rebuild and requalify AMD's AGESA drop before it ships. **Expect months, not weeks**: AMD publishes the bulletin, the OEM ships BIOS somewhere between one and six months later, and for platforms past their support window it may never arrive at all. Applying it is a full node power cycle with the host drained - not a driver reload, not a live patch. Track it as a firmware campaign per server SKU, not per kernel version, and verify afterwards by reading back the SMU/PSP firmware version rather than trusting the BIOS revision string.

References

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