GPU VulnDB

Database/Control plane, storage & DevOps

AMD Versal Adaptive SoC - PLM runtime services address validation: MULTI-TENANT ISOLATION: The Platform Loader

CVE-2025-0037Control plane, storage & DevOpscurated

Impact

MULTI-TENANT ISOLATION: The Platform Loader and Manager firmware on AMD Versal devices does not validate addresses when executing runtime services, so a caller reaches isolated or protected memory spaces. On Versal parts the PLM is the root of trust and the isolation enforcer for the device's partitions - bypassing its address checks means crossing whatever partition boundary the design relies on, which on a multi-tenant SmartNIC or accelerator card is the tenant boundary.

Who can reach it

Local to the device, via PLM runtime service calls.

What to do

Fixed in updated PLM firmware from AMD/Xilinx, applied as a device firmware image plus a card reset. Reaches you through whoever built the card, so expect integrator lag on top of AMD's release. Track which Versal-based cards are in your fleet and who owns their firmware pipeline.

References

This entry is curated: imported from vendor advisories with machine assistance, not yet individually verified. Confirm against your vendor's advisory before acting, and report anything wrong.