Linux kernel (arch/x86/kvm/svm): Hardware ignores the low five bits of CR3 when loading PDPTEs, but KVM's nested SVM

Impact

Hardware ignores the low five bits of CR3 when loading PDPTEs, but KVM's nested SVM path did not, so an L1 guest can offset where the host reads the page-directory-pointer table from. Upstream states the worst case is an out-of-bounds read - if the target page sits at the end of a memslot and the VMM is not using guard pages, the host reads past it and feeds the result into the nested page-table walker.

Who can reach it

Guest-driven: a tenant with nested virtualization exposed sets nCR3 with bits 4:0 non-zero and executes VMRUN with PAE paging in L2. Requires an AMD host with kvm_amd nested=1 and SVM advertised in the guest's CPUID; not reachable if nested virt is withheld from tenants.

What to do

Update to a stable kernel with the linked fix (no fixed release enumerated; take the branch carrying commit 6876793907cb). Interim control: disable nested virtualization for tenant guests (kvm_amd.nested=0, drop SVM from guest CPUID).

References

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