Database/Control plane, storage & DevOps
Linux perf/x86/amd/core - overflow status not cleared for unhandled indices: Unhandled overflow bits are left set
CVE-2023-53073Control plane, storage & DevOpscurated
Impact
Unhandled overflow bits are left set in the PMU status register, so stale overflow state persists and subsequent interrupts are misattributed. The visible effect is corrupted performance data and spurious NMIs - which on a GPU cluster means your capacity and efficiency measurements are quietly wrong.
Who can reach it
Local, through perf counter overflow handling.
What to do
Distro kernel update plus reboot.
References
This entry is curated: imported from vendor advisories with machine assistance, not yet individually verified. Confirm against your vendor's advisory before acting, and report anything wrong.