AMD processors - speculative reordering of loads on shared memory: MULTI-TENANT ISOLATION: AMD processors may

Impact

MULTI-TENANT ISOLATION: AMD processors may speculatively reorder load instructions such that stale data is observed when several processors operate on shared memory. Where that shared memory spans a trust boundary - a shared page between a guest and the host, or between containers - stale reads become a disclosure channel, and worse, code that relies on memory ordering for its own security checks can be made to see the wrong value.

Who can reach it

Local, requires shared memory between attacker and victim and multiple processors operating on it concurrently.

What to do

Mitigated by AMD microcode plus, on most of these, a kernel-side change - and the durable delivery vehicle is the OEM SBIOS/AGESA package, which carries **one to six months of OEM lag** and needs a drained node and a full power cycle. The linux-firmware amd-ucode blobs get you the microcode sooner via initramfs early-load and a reboot, but AMD does not support late-loading microcode on a running EPYC host, so either way this is reboot-required, not a live patch.

References