Database/Firmware, BMC & network fabric
Intel processors (speculative store bypass): Spectre v4: a load speculatively executes before an older store
Impact
Spectre v4: a load speculatively executes before an older store to the same address is resolved, so it reads stale data. The exposure that matters is inside language runtimes and sandboxes where the attacker supplies the code being JITed - which describes most of a model-serving stack.
Who can reach it
Local code execution, including inside sandboxes and JIT runtimes.
What to do
Mitigated by an Intel microcode update plus OS/hypervisor changes. Microcode for this class is normally shipped by your distribution as an early-loadable image, so you can deploy it with a package update and a reboot without waiting for an OEM BIOS release - that distinction is the difference between a week and a quarter. Verify after reboot by reading /sys/devices/system/cpu/vulnerabilities/ rather than assuming the package took effect. The mitigation (SSBD) is opt-in per process on Linux because it costs measurable performance; decide deliberately whether your JIT-hosting workloads get it via prctl or whether you enable it system-wide.
References
Related entries
- Intel SGX Platform Software for Linux (AESM daemon): A local attacker can disable the AESM daemonCVE-2018-3689 · Intel SGX Platform Software for Linux (AESM daemon)Medium
- Intel SGX driver for Linux: Insufficient input validation in the out-of-tree SGX Linux driver lets a localCVE-2019-0157 · Intel SGX driver for LinuxMedium
- Intel PTT / fTPM (ECDSA and ECSchnorr timing): The firmware TPM's signing operation leaks nonce information throughCVE-2019-11090 · Intel PTT / fTPM (ECDSA and ECSchnorr timing)Medium
- Linux bnxt_re RoCE driver (bnxt_re_create_srq memory leak): A tenant can exhaust host memory by repeatedly triggeringCVE-2019-19077 · Linux bnxt_re RoCE driver (bnxt_re_create_srq memory leak)Medium
- Intel processors (vector register sampling): Stale values left in vector registers can be sampled by other contextsCVE-2020-0548 · Intel processors (vector register sampling)Medium
- Intel processors (L1D eviction sampling) / SGX attestation keys: Stale data can be sampled out of L1D fill buffersCVE-2020-0549 · Intel processors (L1D eviction sampling) / SGX attestation keysMedium
This entry is curated: imported from vendor advisories with machine assistance, not yet individually verified. Confirm against your vendor's advisory before acting, and report anything wrong.