Xen Intel VT-d IOMMU page-table handling for PCI passthrough: An inverted boolean means Xen clears a present IOMMU

CVSS 8.2CVE-2013-6375Kernel, userspace & hypervisorXSA-78curated

Impact

An inverted boolean means Xen clears a present IOMMU translation entry without flushing the IOMMU TLB. The device keeps translating through the stale cached mapping, so a passed-through GPU continues DMA-ing into host or previous-tenant memory after the mapping that authorised it has been revoked. This is the failure mode operators most underestimate: the IOMMU page tables look correct in memory while the hardware is still using an older view of them. In a cluster that recycles GPUs between tenants, stale IOMMU cache entries are exactly how tenant N reaches tenant N-1's pages.

Who can reach it

A guest administrator with a passed-through PCI device, arranging for mappings to be torn down while its device continues issuing DMA.

What to do

Patch Xen 4.2.x/4.3.x per XSA-78 and reboot the hypervisor - IOMMU flush logic is not something that can be corrected at runtime. Pair the patch with the companion issue CVE-2013-6400 (XSA-80), which leaves the flush-suppression flag set on an error path and produces the same stale-mapping condition by a different route; patching one without the other leaves the hole open. Requires evacuating every tenant on the node.

References

https://xenbits.xen.org/xsa/advisory-78.html https://xenbits.xen.org/xsa/advisory-80.html https://nvd.nist.gov/vuln/detail/CVE-2013-6375

This entry is curated: imported from vendor advisories with machine assistance, not yet individually verified. Confirm against your vendor's advisory before acting, and report anything wrong.